cv
My academic and professional experience
Basics
| Name | Weixian Xu |
| Label | Machine Learning Researcher |
| hz.czar@sjtu.edu.cn | |
| Url | https://HZxCzar.github.io |
| Summary | Third-year undergraduate at ACM Honors Class, Shanghai Jiao Tong University. My research pursues Self-Evolving AI—transforming models from static tools into dynamic partners via sustained memory and adaptation. Supported by a strong foundation in systems engineering (OS, Compilers), I aim to build human-centric AI systems that grow alongside users. |
Work
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2025.06 - Present Research Intern
GAIR Lab, Shanghai Jiao Tong University
Research focused on Self-Evolving AI and Autonomous Discovery under Prof. Pengfei Liu.
- Core contributor to ASI-Arch (1.1k+ Stars on GitHub).
- Designed autonomous pipelines executing 1,773 experiments.
- Discovered 105 SOTA architectures via evolutionary search.
- Exploring multi-agent collaborative frameworks for research automation.
Volunteer
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2025.09 - Present Class Monitor
ACM Honors Class
Led the ACM cohort, coordinating schedules and managing administrative tasks.
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2025.03 - 2025.06 Head Teaching Assistant
Shanghai Jiao Tong University
Data Structures (CS1951), lectured by Prof. Yong Yu.
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2024.09 - 2025.01 Teaching Assistant
Shanghai Jiao Tong University
Programming (CS1953), lectured by Prof. Huiyu Weng.
Education
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2023.09 - 2027.06 Shanghai, China
Bachelor of Science
Shanghai Jiao Tong University
Computer Science (ACM Honors Class)
- Large Language Models (A+)
- Compiler Design (A+)
- Computer Systems (A+)
- Advanced Compiler Design (A+)
Awards
- 2024, 2025
Foresight-Sequoia Talent Development Fund
Zhiyuan College
Selected Top 5 students in Zhiyuan College.
- 2023, 2024
Zhiyuan Honors Scholarship
Shanghai Jiao Tong University
Academic Excellence Award (Top 2% in SJTU).
- 2022
Publications
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2025.07.24 ASI-Arch: Autonomous Neural Architecture Discovery
arXiv preprint
Autonomous AI system for neural architecture discovery. The project gained 1.1k+ stars on GitHub within a month. Conducted 1,773 autonomous experiments to discover 105 state-of-the-art architectures.
Skills
| Research Focus | |
| Self-Evolving AI | |
| Continual Learning | |
| Multi-Agent Systems | |
| Memory Mechanisms | |
| Affective Computing |
| Engineering & Systems | |
| Rust | |
| C++ | |
| Verilog | |
| Operating System Kernels | |
| Compiler Design | |
| Hardware Architecture |
| Tools & Frameworks | |
| PyTorch | |
| Transformers | |
| CUDA | |
| Linux | |
| Docker | |
| Git | |
| LaTeX |
Languages
| Chinese | |
| Native speaker |
| English | |
| Fluent (TOEFL: 104, Speaking: 25) |
Interests
| Self-Evolving AI | |
| Lifelong Learning | |
| Memory Retention | |
| Continuous Adaptation |
| Human-Centric AI | |
| Affective Understanding | |
| Dynamic Partnership | |
| Preference Alignment |
| Model & Agent Architectures | |
| Internal Neural Structures | |
| Collaborative Frameworks | |
| System Optimization |
Projects
- 2025.06 - 2025.09
ASI-Arch
Autonomous AI system for neural architecture discovery (1.1k+ Stars).
- 1.1k+ GitHub Stars
- 1,773 autonomous experiments
- 105 SOTA architectures discovered
- 2025.04 - 2025.06
ACore
Comprehensive operating system kernel implementation in Rust.
- Virtual Memory & Page Allocation
- Process Scheduling & Threads
- VFS & Multiple Filesystems
- User/Kernel Isolation
- 2025.04 - 2025.06
Imxc
High-performance compiler for C-like language (Java).
- Performance comparable to Clang
- Mem2Reg & Graph Coloring RegAlloc
- Function Inlining & SCCP
- Incremental Compilation
- 2024.09 - 2025.01
RISC-V CPU
Verilog implementation of RISC-V core with Tomasulo architecture.
- Tomasulo Algorithm (Out-of-Order)
- RV32IC Instruction Set
- FPGA Deployment Capable
- Instruction Cache